Innoviz Testimonials

Innoviz-technologies, a global leader in Automotive Lidar technology, is happy to share the following testimonial for our partner Avnet ASIC. As our design partner Avnet ASIC team has made significant contribution to our recent projects. Avnet's involvement was instrumental in the successful tape-out of a critical test chip and the subsequent completion of a full-mask automotive ASIC project.


In the context of our Analog IPs test-chip, Avnet led this project, while Innoviz provided the high level architecture requirements. Avnet’s team led the full-chip frontend implementation and then the backend convergence. The 2 successful tape-outs during 2018 allowed us to successfully evaluate the critical analog IPs before the full-mask project tape-out.  Avnet’s team was attentive to to the project needs and challenges, and was also very dominant in the test-chip architecture and testing plan. Avnet also played a significant role in characterizing the main issues found in the analog IPs, and supporting Innoviz and our IP provider in fixing those issues for the 2nd test-chip tapeout.  


In the context of our flagship automotive ASIC, Avnet team were responsible for full-chip SDC, full-chip reset-clock methodology and implementation, pad-frame design, digital IP implementation, IP level and full chip verification, PPA estimations (using backend flows) and RTL signoff. Avnet’s team technical expertise around backend implementation made them our focal point to all backend related challenges and decisions along the way, helping us to converge this complicated project.


Avnet ASIC is our default partner for all ASIC related projects till this day.


The success of both those projects and the effectiveness of our teams working together was thanks to Avnet’s team seamless integration with our in-house team, promoting productive collaboration and open and effective communication, filling all the missing gaps with their expertise, making sure that  project is successful.


In summary, we highly recommend Avnet as a professional and skilled ASIC design partner. We anticipate continued collaboration and are confident in Avnet's ability to contribute to our future ASIC roadmap.



Oren Buskila,

Chief R&D officer


Shmulik Shemesh

VP Silicon operations


Ran Mor,

VP System Architecture and VLSI


Inuitive Testimonials

I am writing to express our high satisfaction with the collaboration between Inuitive and Avnet ASIC Israel.
Inuitive has been working closely with Avnet ASIC Israel on the productization of our recent product using TSMC 12nm FF process as well as on additional projects using other TSMC processes.

Avnet experienced and multi-disciplinary team assisted Inuitive to deliver parts to customers at record time.
The ability to understand the design, simulate the different blocks as well as the system, generate test patterns and HTOL patterns, write the test program and analyze the test results to optimize the coverage and efficiency of the test program allowed Inuitive to increase the work efficiency, reduce the cycle time and to be push forward with less manpower.
Avnet’s team led the qualification while sharing its experience and recommendations, assisted us to keep the schedule and supported us with all the qualification’s related aspects.

The availability of tester and handler on Avnet premise allowed us to be better prepare for MP: port the test program to the test house faster, deliver a more mature test program, reduce cycle time releases and to provide tested samples much more efficiently.

Based on our positive experiences and the great support we have received from Avnet ASIC Israel; we highly recommend collaborating with their team. Their professionalism, technical prowess, and commitment to excellence have greatly contributed to our achievements, and we look forward to continuing our partnership in the future.

Oded Eisinger
VP Operations
Phone: +972-73-7077486

Vayyar Imaging Testimonials

We did our first chip, code name "Octapus", with AAI on TSMC 65nmLP process in 2012. We worked with AAI on the backend of an extremely complex chip which included RF, very fast ADC’s and DAC’s and multiple fast SERDES lines. The timelines for this chip were extremely aggressive and required to have 4 different subcontractors and IP companies to work together and interface with AAI.

AAI team was super professional and basically worked with us as if they were part of our company. They met their timelines and even helped other subcontractors when needed. Their dedication and high standards had high impact on the quality of our chip and helped our success as a company.

It is probably the best team in Israel and one of the best teams I have seen globally so far. We have gone further with AAI to do a new family of Automotive grade chips code name "Centepede" and have taped out 3 generation of this family, also in TMSC 65nmLP. We are now doing the 4th generation in TSMC 28nm HPC+ generation chip and we have chosen AAI as our design center without thinking twice.

As an ex-VP and GM of Intel’s mobile wireless group, I worked with many teams around the world and level of service and professionality of the AAI team is one of the highest I have ever worked with.


Raviv Melamed

CEO Vayyar Imaging


NXP (previously PLSense) Testimonials

The PLS15 chip was a unique chip that operates on programmable voltage from the Sub Threshold domain to the nominal voltage domain which is optimized on the fly to fit the performance of the chip and the environmental conditions. The PLS15 was manufacture at the 40nm ULP TSMC process.


AAI was responsible for the Physical Design of this project which was very complex and includes different voltage domains, complex power down modes and complex UPF. The project also includes a special Sub Threshold standard cell library and special low power Analog block which needed to be used at the P&R and the SoC integration. AAI did all the Physical design work and integration of this chip until ready GDS that was delivered to the Fab.


AAI did a very good and professional work, helping the PLSense team to solve different issue which relates to the PLSense special standard cell libraries and Analog blocks. The AAI team was very dedicated and pushed the work forward in order to release the Tape-Out on time.


AAI also did for us the RTL to GDSII of the PL10TC project, which was an earlier version of the PLS15. Staying with AAI to work also on the PLS15 device, demonstrates our satisfaction and appreciation of AAI work.


Best Regards,

Uzi Zangi

CEO of the ex-PLSense operation

Tier One Semiconductor Company Testimonials

At the end of 2014 we have decided to outsource to AAI the back-end activities of one of our projects, code named "CDR A0", targeted to be implemented in TSMC 28nm HPM process. We have selected AAI as they can provide local support, with fast response, in the same language, same time zone, and as well for their experience and expertise with Deep Sub-Micron SoC design methodologies and particularly their knowledge of TSMC libraries, requirements and tape-out procedures for 28nm process. AAI has a good reputation here as a quality team, familiar with the full ASIC design flow including a full implementation of RTL2GDSII, and equipped with state-of-the-art CAD tools, similar to our design flow. AAI in fact acted as our integral design team and the engineers worked in complete synchronization with our internal teams, enabling our engineers to focus on the architecture and RTL coding and both teams to meet frequently at short response time and solve any potential design issues. The project was very successful and we believe that the combination of our unique technology, the responsiveness and dedication of AAI team and the synergy and close working of both teams enabled us to meet all milestones and to receive first-time-working silicon on time. We believe that AAI is a good choice for any company looking to outsource, as service or as full turn-key project the RTL2GDSII implementation and any other ASIC design implementation and manufacturing activities.


Yossi Rav-Tal

Silicon Integration Manager