Celeno Testimonials

We (ex-Celeno) did 3 projects with AAI in below technologies:

• 40nm
• 14nm
• 28nm

All 3 projects are for wireless communication chips.

Project size vary from few millions’ gates to few 10’s of millions gates

In all 3 projects meeting timing was a challenge and required using overdrive and LVT/SLVT cells

For all 3 projects AAI performed RTL2GDS including

• DFT (MBIST, BSCAN, SCAN) including
  • MBIST and BSCAN controller implementation  
  • MBIST+repair using OTP
  • Test controller
  • SCAN insertion including coverage improvement
  • MBIST, BSCAN and ATPG vector creation
  • MBIST, BSCAN and ATPG vector debug on tester
• Physical design including
  • Digital and analog-IP integration
  • IO design
  • ESD design    
  • Floorplan including PAD/Bump and power grid insertion
  • Synthesis
  • P&R including routing of special signals, ECO-cells and DECAP insertion  
  • Formal verification (equivalent check)
  • Timing closure including signal integrity (meeting signoff recommendation)
  • Power, IR-drop and Elector-migration analysis and optimization (meeting signoff recommendation)
  • DFM & Physical verification (meeting signoff recommendation)
  • ESD verification (meeting signoff recommendation)
• Package netlist + package reference design according to OSAT design rules

AAI team is highly professional and highly motivated, throughout the projects AAI showed high level of commitment.

Schedule was always met for MPW tapeouts and had some (reasonable) slippage for full-mask tapeouts

All chips came out working 1^st time (no mask retrofit was required)

Happy to give more details if required

Amir Freizeit

VP IC-Engineering

Celeno wireless communication